Metaharmos Universal Flash Storage (UFS) Host & Device Controller IP is a standard-based serial interface engine for implementing the JEDEC UFS interface in compliance with the JEDEC UFS, UFS Host Controller Interface (UFSHCI) standards. Metaharmos UFS Host & Device Controller IP, compliant with the latest UFS v3.0 standard, is a high-performance, low-power interface that is primarily used in applications where data is stored on embedded or removable non-volatile mass storage memory devices. The UFS Host & Device Controller IP integrates the UFS host & device controller application layer with a pre-configured Metaharmos MIPI® UniPro protocol stack that is optimized for UFS host & device applications.
Given the sensitive data stored on many mobile devices, smartphones in particular, robust security is an important consideration. Metaharmos UFS Host & Device Controller IP was designed with robust security features. Metaharmos’ implementation of the AES-XTS encryption/decryption block, supporting 128- and 256-bit keys, is part of the data pipeline, ensuring transparency without any performance loss as it does not take any additional CPU cycles. In addition, Replay Protected Memory Block (RPMB) ensures that device memory regions can only be accessed by authenticated host applications. The Metaharmos Host & Device Controller supports the necessary commands and data structures.
A standard-based synchronous bus system, such as APB, connects the IP to the rest of the system-on-chip (SoC). This bus is connected to the register interface and the Direct Memory Access (DMA) interface of the IP. The register and data structure implementation is based on the UFSHCI specification and is used by the UFS Host Controller's DMA engine. Leveraging industry standards in the UFS Host & Device Controller ensures compatibility and performance.
When the Metaharmos UFS Host & Device Controller IP is combined with the Metaharmos MIPI® UniPro Controller IP and partners' MIPI M-PHY IP, Metaharmos provides a single window UFS IP solution that designers can easily integrate into application processors with less risk, while speeding time-to-market of advanced SoCs and device integrated circuits (ICs).